ECM Casa IV · engineering explorer

Brew control, without erasing the machine.

Trace the proposed PID retrofit through the Casa IV’s original controls, heater safety chain and the exact ProS3 header pins. Select a mode or click any component for its role, terminals and verification gate.

Design architecture · survey not complete

Interactive system architecture

ECM Casa IV PID retrofit architecture with explicit connection points Point-to-point architecture for the Casa IV retrofit. Every wire ends at a labelled terminal circle. Filled dots are electrical junctions; outlined crossings are not connected. The three RTD conductors route below the heater, and the Phases 6–7 supervised local control has separate 3V3, IO13 and ground points. CASA IV · OEM HARDWARE HEATER POWER · PROVISIONAL UNTIL TRACED NEW CONTROLLER · SELV ECM CASA IV pump pressure POWER STEAM COFFEE HOT WATER COFFEE OUT WATER OUT COFFEE IN WATER IN Pump + 3-way valve OEM context · untouched by PID trace these paths on machine CASA IV BOILERP2042.4 · 1200 W heater 104 °C 135 °C 165 °C SURFACEPT100 A1 · A2 · Bclamped · positively retained 240 V AC OEM cord +power switch ANPE 165 °C SAFETYINOUT OEM MODEA INSTEAM OUTBREW OUT 135 °CINOUT 104 °C OMRONG3NB-210B-1 124−3+ 1/2 AC OUTPUT3+/4− DC INPUT FAIL-OFF GATESSR 4−GNDDEMANDHEARTBEATBC337 · 2k2 · 4k7 pull-down ISOLATEDAC INIO14 OUT MEAN WELLIRM-05-585–305 VAC5 V · 1 A LN+− INOUTT500 mA Hprovisional HEATERACTIVE INN OUT1200 W nominal PE STUDoriginal chassis earth · preserve UNEXPECTED MAKER ProS3ESP32-S3 · project port map 5V INGNDIO14 MODE IN IO16 DEMAND OUTIO15 HEARTBEAT OUT IO13 LOCAL INGND 3V3GNDSCKMISOMOSICS 10k PU10k seriesLOCAL MAX31865 VINGNDCLKSDOSDICS RTD A1RTD A2RTD B MAX31865verify 430 Ω + terminal mapping HOME ASSISTANTWi-Fi · no physical wire
Active Neutral Protective earth Selected heater path 5 V SELV Logic / sensor Solid = OEM/retained Dashed = added
Build gates · test before advancing

Eight controlled phases

Each phase ends with recorded evidence and a stop/go gate. Phases 0–3 are de-energised or SELV-only. The stock machine is not altered electrically until its sensor baseline and every low-voltage failure path have passed.

You already have the first tool

Digital multimeter: useful for unplugged continuity/resistance and live SELV measurements. It is not enough to prove boot-time glitches, appliance insulation or protective-earth integrity, and this plan does not ask you to probe inside an energised machine.

Buy or borrow for the bench

Current-limited 0–6 V bench supply, rated for at least 1 A; a known-good USB supply or power bank; insulated clip leads; a reference thermometer; and optionally precision PT100 substitution resistors. Set the ProS3 rail to 5.0 V and never above 5.2 V.

Borrow rather than improvise

Two-channel oscilloscope for the heartbeat/SSR-input proof and a contact thermocouple logger for the heatsink. Use a normal grounded scope only on the SELV bench while it is physically disconnected from mains. The electrician supplies appliance-safety and mains test instruments.

0Survey and quarantineNo power · establish facts before design freeze
Build
Photograph and label the untouched loom; trace brew/steam topology; record nameplate, thermostat markings, heater resistance, terminal sizes, enclosure space and candidate non-pressure-boundary probe location. Separately inspect every ordered retrofit part while it remains off-machine and electrically disconnected; quarantine anything inconsistent with its datasheet.
Tools
Multimeter, calipers, camera, labels and notebook. Resistance/continuity only after unplugging, proving dead and isolating the measured part where parallel paths would corrupt the reading.
Verify
Calculate heater power from measured cold resistance; confirm all three OEM thermostats and protective earth remain; produce an as-found schematic with wire IDs and photographs.
Gate
Do not buy final mounting hardware or design the mains PCB until the trace and dimensions are complete and independently reviewed.
1PT100 and MAX31865 benchSELV only · make temperature measurement trustworthy
Build
Wire the ProS3, MAX31865 and PT100 only. Use LDO1 3V3, the documented SPI pins, the measured RTD wire count and the matching board jumpers. Configure the 50 Hz rejection filter.
Tools
Approved USB supply/power bank or 5.0 V current-limited bench supply, multimeter, ice bath, boiling-water bath, reference thermometer and insulated clips.
Verify
Measure the probe resistance before connection; compare ambient, stirred ice bath and boiling-water readings with the reference; unplug and short the RTD leads to confirm explicit faults. Record reference uncertainty and target agreement within 1 °C rather than silently applying an offset.
Gate
Stable readings, correct fault reporting and a confirmed surface-mount retention plan. Reject the generic probe if its wiring, insulation or temperature rating cannot be proven.
2Firmware logic simulatorUSB/SELV only · every external component is mocked
Build
Flash phase2_logic_sim. It runs the real state machine, PID, 5 s slow PWM, settings validation, mode-specific limits and RGB annunciation with serial-controlled temperature/mode, fixed simulated settings, a monotonic clock and an in-memory demand sink. IO15 and IO16 remain locked low.
Tools
USB-connected ProS3 and serial monitor; a multimeter may confirm IO15/IO16 remain low. No MAX31865, steam detector, driver, SSR or mains connection is used.
Verify
Run the native coverage suite, then inject open/short/stale/non-finite readings, invalid mode, no-rise, excessive-rise and hard maxima. Confirm steam forces demand off and post-steam cooldown does not nuisance-latch the brew ceiling.
Gate
All native mock tests and coverage thresholds pass, both bench firmware profiles build, and a serial fault-injection record shows every latch removes simulated demand. No SSR is connected.
3Hardware fail-off and mode benchSELV output side · scope the states a meter can miss
Build
Flash phase3_driver_bench, then add the independent IO15 heartbeat permit, IO16 demand gate, BC337/4.7 kΩ driver and only the G3NB input terminals 3+/4−. G3NB output terminals 1/2 stay physically empty. The provisional IO14 pull-up treats an open lead as steam/inhibit but cannot diagnose it; the final isolated detector must distinguish brew, steam and invalid open/short bands.
Tools
5.0 V current-limited bench supply, multimeter and preferably a two-channel oscilloscope. A logic analyser can confirm digital timing but cannot replace the analogue SSR-input trace.
Verify
After IO14 has indicated brew continuously for 250 ms, enter arm driver-bench before each bounded permit, pulse, static-low, static-high or demand-only command. Capture power-up, reset, flash, static/missing heartbeat, IO16 demand-only and steam-mode interruption. The G3NB input must remain below 1 V when off, exceed 4 V only with valid heartbeat plus demand, and lose drive within the measured hardware timeout.
Gate
Native supervisor tests pass and saved scope captures prove there is no trigger pulse, the 500 ms precharge occurs, commands expire by five seconds and every single fault fails off. Firmware completion alone does not pass the hardware gate; never connect G3NB terminals 1/2 to AC in Phase 3.
4Stock-machine thermal baselineSensor only · heater wiring remains factory stock
Build
Flash phase4_stock_logger, mechanically retain the PT100 and its independent strain relief, and use the Phase 3-accepted isolated IO14 mode signal. The firmware stores one-second CSV records in onboard LittleFS; IO15/IO16 stay low and networking is absent. Reassemble the stock machine and run the protected logger from a power bank with ordinary USB disconnected.
Tools
Power bank, reference/contact thermometer and camera. Prepare and test flash storage on the isolated USB bench; no laptop lead or exposed internal part is present during mains operation.
Verify
Record at least three brew-stat and three steam cycles, including raw PT100 data, mode, shell temperature and dT/dt. After switching off, unplugging and proving dead, reconnect USB, run flush/dump, save the CSV and inspect the cold probe for movement or lead damage.
Gate
Recovered, repeatable CSV traces; correct mode annotations; no storage/sensor faults; and a probe that cannot detach. Use scripts/analyze_phase4.py as a review aid before proposing initial setpoint, no-rise and rate-of-rise envelopes.
5Mains integration and lockout diagnosticsLicensed electrician · no hobby live probing
Build
Flash phase5_install_lockout while unplugged; it has only read-only commands, repeatedly drives IO15/IO16 LOW and latches a GPIO readback HIGH. The electrician installs the fused IRM-05 PCB, barriers, steam detector, heartbeat gate, SSR/heatsink, high-temperature wiring, enclosure and service provision while retaining protective earth and all OEM thermostats.
Tools
Electrician-selected CAT-rated instruments, earth-bond/continuity tester, insulation-resistance or appliance-safety tester, leakage test equipment and calibrated termination tools. Your general-purpose multimeter is not the acceptance instrument.
Verify
Firmware status confirms only input health and LOW GPIO readback. Separately record visual/clearance review, protective-earth continuity, polarity, insulation resistance using a method safe for connected electronics, fuse coordination, strain relief and leakage/appliance tests. Powered checks are only under the electrician's controlled procedure.
Gate
Electrician-accepted as-built schematic, instrumented test record and fitted covers/barriers. A green LED is not electrical-safety evidence; any failed test returns the appliance to a de-energised repair state, and Phase 5 performs no functional heating.
6Controlled commissioningImplemented but authorization-blocked pending evidence
Build
phase6_commission uses the real sensor, isolated mode input, PID/interlocks, heartbeat gate, checksummed NVS settings and a supervised IO13 deadman: 10 kΩ pull-up to always-on LDO1 3V3 plus a remote normally-open switch and 10 kΩ series resistor to GND. The repository evidence gates remain false, so the current binary reports authorization-blocked and cannot heat. Networking and serial heat/fault-clear commands are absent.
Tools
Contact thermocouples on SSR/heatsink/enclosure, logger, timer and electrician-operated current measurement if required. No grounded oscilloscope or ordinary USB cable is attached to the energised appliance.
Verify
First prove authorization-blocked output on the SELV bench. Only after reviewed Phase 4/5/IO13 evidence, confirm one-second released qualification, two-second hold, 500 ms heartbeat precharge, 25% cap, immediate release/steam/fault shutdown, three-second local fault acknowledgement and two-minute session expiry. Measure legitimate heat-up at that exact cap and accept the output cap, no-rise window and minimum rise as one coupled tuple; any cap change invalidates the tuple. Then measure terminal, SSR and sink temperatures through staged trials.
Gate
Accepted evidence identifier in source, reviewed thresholds/settings and the full installed fail-off/thermal record. A build, green LED or short successful heat cycle is not acceptance. Stop immediately on smell, noise, leakage, unstable temperature or unexpected current.
7Release candidate, soak and handoverImplemented but authorization-blocked pending Phase 6 acceptance
Build
phase7_release replaces the Phase 6 session with normal local regulation after one second of valid released IO13 input. It restores a checksummed NVS record or an accepted compiled fallback, uses the same heartbeat-gated output and retains local fault acknowledgement. Four checked-in release gates remain false, so the current binary reports authorization-blocked and cannot heat. Networking, OTA and commissioning/settings-write commands are absent.
Tools
Phase 6 evidence, temperature logger, fast cup-water thermometer or thermocouple, scale/timer, contact thermocouples on the SSR/heatsink/enclosure, clean build workstation and durable storage for the binary, ELF, manifest and rollback package.
Verify
Prove the checked-in authorization block on the SELV bench. For a reviewed candidate, test held-at-boot, released qualification, invalid/open/short IO13 states, 500 ms precharge, every sensor/mode fault, steam/cooldown, corrupt or missing NVS, visible compiled-fallback warning and local fault acknowledgement. Then run five brew cycles, three steam recoveries and a one-hour attended soak.
Gate
Accepted Phase 6 record, reviewed final limits/fallback, completed soak and fault regression, reproducible binary/ELF hashes, final schematic and an identified rollback package. Only an independently reviewed source change may set all four release gates and label the rebuilt artifact as release firmware.
Exact header reference

ProS3 pin allocation

The labels and physical header order below are transcribed from Unexpected Maker’s ProS3 pinout card. Gold rows are assigned by this project; red-edged IO0 and IO3 are boot-strapping pins and deliberately unused.

Unexpected Maker ProS3 header pinout and project allocation Both ProS3 header rows are shown in physical top-to-bottom order. Assigned SPI, SSR output and power pins are highlighted. ProS3 · ESP32-S3 USB-C AT TOP · BATTERY CONNECTOR AT BOTTOM ESP32-S3 16 MB FLASH 8 MB PSRAM RESETBOOT VBAT + / − IO35 · D35SPI MOSI → MAX31865 SDI IO37 · D37SPI MISO ← MAX31865 SDO IO36 · D36SPI SCK → MAX31865 CLK IO34 · D34SPI CS → MAX31865 CS IO9 · D9 · A8I²C SCL · reserved optional IO8 · D8 · A7I²C SDA · reserved optional IO7 · D7 · A6ADC1_CH6 · TOUCH7 · RTC_IO7 IO6 · D6 · A5ADC1_CH5 · TOUCH6 · RTC_IO6 RESETsystem reset GNDSELV return IO43 · D43 · TXUART TX default IO44 · D44 · RXUART RX default IO38 · D38general IO IO39 · D39JTAG MTCK IO40 · D40JTAG MTDO IO41 · D41JTAG MTDI IO42 · D42JTAG MTMS VBAT1S LiPo · max 4.2 V GNDSELV return 5VIRM-05-5 input · 4.8–5.2 V only 3V3 · LDO1MAX31865 + IO13 pull-up IO1 · D1 · A0ADC1_CH0 · TOUCH1 · RTC_IO1 IO2 · D2 · A1ADC1_CH1 · TOUCH2 · RTC_IO2 IO3 · D3 · A2STRAPPING · leave unassigned IO4 · D4 · A3ADC1_CH3 · TOUCH4 · RTC_IO4 IO5 · D5 · A4ADC1_CH4 · TOUCH5 · RTC_IO5 IO21 · D21RTC_IO21 IO0 · D0STRAPPING · BOOT · leave unassigned 3V3 · LDO2output only IO16 · D16 · A15heat demand → hardware gate IO15 · D15 · A14heartbeat → hardware permit IO14 · D14 · A13isolated steam-mode input IO13 · D13 · A12Phases 6–7 supervised local control IO12 · D12 · A11ADC2_CH1 · TOUCH12 · RTC_IO12 FACTUAL PIN LABELS TRANSCRIBED FROM UM CARD · PROJECT ASSIGNMENTS ARE PROPOSALS
Visual parts index

Component atlas

Purpose-drawn vector illustrations preserve the important physical distinctions and terminal labels without pretending an AliExpress listing photo proves the delivered part’s identity. Click a card for its acceptance checks.

Source boundary

Component identity and physical positions come from locally held ECM Casa IV research copies, which are intentionally not republished here. The ProS3 header order and proposed project assignments are checked against Unexpected Maker’s official card; the mains topology remains survey-dependent.

ECM support · Official ProS3 pinout cards · UM 5 V limits · Omron G3NB specifications · Mean Well IRM-05 · PlatformIO ProS3 · Adafruit MAX31865 · SafeWork NSW electrical testing